paper:synthesizable finit state machine design techniques using the new systemverilog 3.0 enhancements之onehot coding styles(index-parameter style with registered outputs)-LMLPHP

case语句中,对于state/next 矢量仅仅做了1-bit比较。

paper:synthesizable finit state machine design techniques using the new systemverilog 3.0 enhancements之onehot coding styles(index-parameter style with registered outputs)-LMLPHP

parameter 值不是表示FSM的状态编码,而是表示state/next变量的索引。

paper:synthesizable finit state machine design techniques using the new systemverilog 3.0 enhancements之onehot coding styles(index-parameter style with registered outputs)-LMLPHP

04-02 03:19