问题描述
在英特尔处理器上，每个内核都有自己的 L1 和 L2 缓存.这在 ARM 双核处理器上是真的吗?如果是这样，我是否可以依赖两个内核之间的缓存一致性，以便在内核 0 上运行的线程将始终在其缓存中看到内核 1 在其缓存中看到的相同数据?
On Intel processors, each core has its own L1 an L2 caches. Is this true on the ARM dual-core processors? If so, can I rely on cache coherency between the two cores, such that a thread running on core 0 will always see the same data in its cache that core 1 see in its?
推荐答案
你是说 ARMv7 吗?我不认为有一个 ARM7 双核，你可以把两个放在一个芯片中，但它们是独立的(而且它们没有带有缓存，所以你必须实现自己的).
Do you mean ARMv7? I dont think there is an ARM7 dual core, you could put two in a chip sure but they would be independent (and they didnt come with caches so you would have to implement your own).
这是 ARM 的故事，与英特尔没有任何区别，除了英特尔从事芯片业务，ARM 从事 IP 业务，他们不制造芯片.
Here is the story with ARM, not really any different than intel except intel is in the chip business, arm is in the IP business they dont make chips.
从 http://infocenter.arm.com 开始创建一个免费帐户的一些文档，ARMv7 中的特别是您需要登录.
start at http://infocenter.arm.com create a free account some of the docs, ARMv7 in particular you are going to need to log in.
ARM 文档有两种类型.有ARM ARM 的ARM Architectural Reference Manual 的.曾经是一本涵盖所有内核的大手册，现在它被分解为内核系列，涵盖了一个内核系列的整体相似性、指令集等.由于您问的是双核/多核，因此您很可能在谈论 Cortex-A ARMv7-A(不是 ARMv7-M，它们是单核微控制器).或者，您可能指的是 ARMv6 内核，例如 mpcore，它有 1 到 4 个内核变体.在内容左侧的信息中心站点上，您选择 arm 架构，然后第一件事是参考手册.这就像手臂医生的全科医生，家庭医生，而不是任何领域的专家，什么都知道.
There are two types of ARM docs. There are the ARM ARM's the ARM Architectural Reference Manual's. Used to be one big manual covering all the cores, now it is broken into core families covering the overall similarities, instruction set, etc for a family of cores. Since you are asking about dual/multi core you are likely talking about the Cortex-A ARMv7-A (not the ARMv7-M those are single core microcontrollers). Or maybe you meant the ARMv6 cores like the mpcore which has a one to four core variant. On the infocenter site along the left under contents you select arm architecture then the first thing is reference manuals. This is like the general practitioner of arm docs, the family doctor, not a specialist in any field just knows something about everything.
第二种类型的 arm doc 是 TRM，技术参考手册，这是专家、脑外科医生或足病医生等.您可以找到芯片供应商使用的特定核心(可能容易或困难，取决于芯片和供应商)，这将描述核心的边缘是什么样子，它将描述缓存在哪里，谁共享或不共享它们以及如何共享.注意L1缓存和mmu往往在核心的TRM中，L2缓存是额外的成本项目，不一定是芯片厂商购买的.L1 缓存或 mmu 不一定位于 amba、axi 总线上，l2 是 amba/axi in、amba/axi out shim，在交易经过时修改或消耗事务，您仍然必须放置您的内存系统在外层 amba/axi.
The second type of arm doc is the TRM, the technical reference manual, this is the specialist, the brain surgeon or podiatrist, etc. You find the specific core that the chip vendor is using (can be easy or hard depending on the chip and vendor) and that will describe what the edges of the core look like it will describe where the caches are, who shares them or not and how. Note that the L1 cache and mmu are often in the TRM for the core, the L2 cache is an extra cost item, not necessarily purchased by the chip vendor. the L1 cache, nor mmu, does not necessarily sit on the amba, axi bus, the l2 is an amba/axi in, amba/axi out shim, modifying or consuming transactions as they go by, you still have to put your memory system on the outer layer amba/axi.
简短的回答是，您需要更具体地说明您所谈论的是哪个 arm 内核，然后一旦您知道找到该内核的 TRM，它就会包含您问题的答案.
The short answer is you need to be more specific about which arm core you are talking about, and then once you know that find the TRM for that core, and it will include the answer to your question.
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